openRFC - Nova 1

FAULT-TOLERANT EDUCATIONAL SPACE COMPUTER - DESIGNED WITH THE HELP OF THE A.I.

This is not just a computer - it's a mission-grade educational platform.
Designed by the help of my A.I. assistant, Nova - with fault tolerance, modularity, and hands-on learning in mind. This custom-built system brings together the best of space-hardened architecture and experimental flexibility. The architecture closely mirrors principles used in real satellite onboard computers, offering both robustness and transparency for system-level learning.

CORE ARCHITECTURE
- Triple Motorola 68030 CPUs
  - Operate in Lockstep Mode for fault detection via majority voting
  - Hardware-level synchronization and parallel execution
- FPGA Central Logic (Xilinx Virtex-5)
  - Handles address decoding, bus arbitration, fault voting logic
  - Implements watchdog, expansion controller, and reset manager
- Memory Subsystem
  - 16MB NOR Flash (S29GL128S90TFI020) with 22-bit address and 16-bit data bus
  - Radiation-aware SRAM with 32-bit bus, ECC-friendly layout
  - Redundant series resistor networks (2x 33 Ohm) for fault-tolerant bus signaling POWER AND RESET
- PMU with Sequencing  - Safe startup for all voltage domains
  - Controls reset timing for CPUs, FPGA, and memory
- Watchdog Logic (Dual System)
  - Internal FPGA-based timer with heartbeat monitoring
  - External discrete watchdog IC resets system if FPGA stalls

EXPANSION AND INTERFACES
- 3x DIN 41612 Expansion Ports (96-pin)
  - Shared 32-bit A/D multiplexed bus
  - SPI, I2C, UART, interrupt, chip select, and user IO lines
  - All signals protected with TVS diodes and redundant resistor networks
- Fault Injection via DIP Switch
  - 9-position manual fault injector for bus testing and error simulation
- Debugging & Testability
  - Labeled test points for all major buses
  - LED indicators for power, activity, fault, and status
  - Future-proof connector layout for add-ons

SOFTWARE & FIRMWARE

- Boot monitor stored in NOR flash
- Verilog-based memory controller with read/write sequencing
- UART console interface for command and debug access- Firmware image supports memory tests, DIP fault detection, and expansion access
BUILT FOR:
- Embedded systems education and engineering labs
- Fault-tolerant computing courses and research projects
- CubeSat and space experiment prototyping
- Retro-computing exploration in a modern fault-safe context

DESIGNED LIKE SPACE HARDWARE, WITH THE HELP OF MY A.I. COPILOT: NOVA
This board reflects real-world mission system practices:
- Modular, testable, and observable architecture
- Radiation-aware layout and signal protection
- Bus redundancy and graceful failure modes
- Flexible enough to be both a dev board and a working flight-like computer

If you're serious about fault-tolerant systems, real-time logic, or learning how spacecraft think - this board is your launchpad.
Schematics, BOM, and build documentation coming soon
Contact me if you're interested in contributing, building, or collaborating!